mshv: use VP register page for RIP/RAX writes in run_vcpu#1366
mshv: use VP register page for RIP/RAX writes in run_vcpu#1366ludfjig wants to merge 1 commit intohyperlight-dev:mainfrom
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Replace set_reg() hypercalls with direct VP register page writes for the RIP increment on IO exits and the RAX write on IO-in (hw-interrupts). The VP register page is a shared memory page between userspace and the hypervisor that is picked up automatically on the next DISPATCH_VP, eliminating one hypercall per IO exit. Signed-off-by: Ludvig Liljenberg <4257730+ludfjig@users.noreply.github.com>
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| // SAFETY: The register page is a valid mmap'd page | ||
| // from create_vcpu and is always populated after a | ||
| // vcpu run returns an intercept message. | ||
| unsafe { |
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Its a pity RegisterPage doesn't have safe accessors for all the data, might be worth an upstream PR?
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It looks like upstream code uses mshv_bindings::set_gp_regs_field_ptr, e.g. here---so perhaps that at least is worth using
simongdavies
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This is a great update Thanks!!
syntactically
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Mostly LGTM, but some minor comments.
| // SAFETY: The register page is a valid mmap'd page | ||
| // from create_vcpu and is always populated after a | ||
| // vcpu run returns an intercept message. | ||
| unsafe { |
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It looks like upstream code uses mshv_bindings::set_gp_regs_field_ptr, e.g. here---so perhaps that at least is worth using
| let page = self | ||
| .vcpu_fd | ||
| .get_vp_reg_page() | ||
| .ok_or(RunVcpuError::NoVpRegisterPage)?; |
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It looks like a lot of the code in mshv-ioctls uses VcpuFd::is_valid_vp_reg_page to check that the hypervisor has set some validity state saying that the vp reg page access works---do we need to do that as well?
Replace set_reg() hypercalls with direct VP register page writes for the RIP increment on IO exits and the RAX write on IO-in (hw-interrupts). The VP register page is a shared memory page between userspace and the hypervisor that is picked up automatically on the next DISPATCH_VP, eliminating one hypercall per IO exit.
Benchmark Results (MSHV)